Conference Secretary at:
1st floor of Physics and Mathematics
Section of Electronics & Computers.
Tel.: + 30 2310 998071


MOCAST is Technically Sponsored by:




Keynote Speeches:



The next step in heterogeneous computing: Near-memory and in-memory computing

       by Prof. Dietmar Fey,   University Erlangen-Nuremberg, Germany




The most driving force in designing new processor and computer architectures in the last two decades was the necessity to save the energy consumption in the circuits needed for processing, storing and transporting data. More and more powerful embedded devices as well as manageable HPC systems could satisfy the demand for more compute performance only since they reduced drastically their energy consumption. This process brought us the development from single-core to multi/many-core and heterogeneous architectures and it is necessary that this process has to continue.

And this next step will bring us the realisation of new concepts for a closer co-operation of processing and storage what is denoted as near-memory processing and in-memory processing. This new kind of processing or better to say pre-processing is the consequence of the fact that it costs sometimes more energy to move data from storage to processor than to process it directly on that location where the data is, either in the memory or close to a data capturing sensor. The last scenario corresponds to that what is denoted as edge computing in literature.

The emerging of new memristive devices like e.g. ReRAMs, PCRAMs or STT-MRAMs, which can not only store data energy-efficient but also process it supports decisively the design and future realisation of new energy-aware near-and in-memory computing architectures. Besides, they offer also new qualitative benefits compared to conventional SRAM and DRAM technologies like the storage of multiple states in one physical memory cell.  The keynote will present a generic overview of the development towards near- and in memory computing concepts as well as an evaluation of concepts for Boolean data processing with memristive devices. In addition, results achieved in the lab of the speaker for energy-efficient non-volatile flip-flops as well as ternary compute units are discussed as a possibility on the way to energy-saving near-memory and in-memory computing architectures.  


Short CV:  Prof. Dr.-Ing. Dietmar Fey holds a diploma degree in Computer Science from Friedrich-Alexander-University (FAU) Erlangen-Nürnberg, Germany.  In 1992 he received a Ph.D. from FAU with a work on an investigation about Using Optics in Computer Architectures. From 1994 to 1999 he researched at Friedrich-Schiller-University Jena where he made his habilitation. From 1999 to 2001 he worked as lecturer at University Siegen before he became a Professor for Computer Engineering at University Jena. Since 2009 he leads the Chair for Computer Architecture at FAU Erlangen-Nürnberg.

Prof. Fey was involved in several national and international research projects and initiatives on parallel and embedded computing. He participated in the nationwide priority Program “SPP 1188 Organic Computing” funded by German Research Foundation (Deutsche Forschungsgemeinschaft DFG) and in the DFG-funded Ph.D. student elite Research Training Group on “Heterogeneous Image Systems”. Furthermore he was involved in the project “Interchip Optical Communications and Photonic PCBs for next generation OBP” funded by ESA and in joint projects with industrial partners on Grid and Cloud Computing technology (Optinum Grid, part of the German D-Grid community, and Cloud4Eng, part of the nationwide program Trusted Cloud). Currently he is a member of the H2020 project AllScale working on new C++ based parallel programming concepts for heterogeneous architectures.  He has published over 115 conference papers articles, 3 books, and about 100 papers in journals and reports. He is a member of HiPEAC (European Network of Excellence on High Performance and Embedded Architecture and Compilation) and a contributor of the HiPEAC roadmap, author of the Eurolab4HPC report “Disruptive Technologies for years 2020-2030”, and he is a member of the EU Cost Action 1401 “Memristors Devices, Models, Circuits, Systems and Applications”.

His research interests are in parallel computer architectures, parallel programming environments, parallel embedded systems, and memristive computing.






Dealing with Complexity in Synthesizing System and Devices for Communication/Sensing Systems:The System-by-Design Paradigm

      by Prof. Andrea Massa, IEEE Fellow, University of Trento, Trento, Italy




Synthesizing modern devices and systems for Communications and Sensing is mainly concerned with the solution of high-complexity problems, where the term complexity stands for large scale and/ or strong nonlinearity and/or ill-posedness. Moreover, the focus of the research in the design of complex systems has recently shifted from ad-hoc strategies based on the designer experience to automated iterative search methods thanks to the availability of huge computational resources and by the existence of efficient simulation tools that reliably evaluate the “quality” of the guess design. Nevertheless, several synthesis problems still remain computationally intractable (i.e., their optimization through iterative procedures requires months/years). However, such a class of problems is becoming more and more important because of increasing demand for advanced systems operating across different scales (e.g., combining nano- to macro-scale). The SbD is “a functional ecosystem to handle complexity in the design of large systems” and it consists in a guideline for the task‐oriented design, definition, and integration of system components to yield devices/systems with user‐desired performance having the minimum costs, the maximum scalability, and suitable reconfigurability properties. More specifically, it addresses three fundamental issues. Firstly, the identification of the solution descriptors that represents a formulation challenge. Indeed, a proper choice must guarantee a large flexibility for the potential solution (e.g., in terms of geometry and features of each sub‐system) without yielding to huge search spaces, which can become practically unmanageable for any search strategy. Secondly, the evaluation of the system/device response of the iteratively identified guess solutions in an accurate and fast way represents a modeling challenge. The assessment of the effectiveness/quality of a guess design (e.g., in terms of a suitable “cost function”), which is the fundamental information required by any synthesis procedure, should be done efficiently to enable the adoption of automatic iterative search techniques. Thirdly, the choice of the search methodology, which represents an exploration challenge. Actually, the solution‐space sampling should find the “best solution” descriptors (i.e., the global optimum of the problem) whatever the complexity of the cost function at hand. Unfortunately, no general purpose approach exists to address these issues and sub‐optimal strategies are often adopted in practice.As a result, the SbD guideline is that of defining, through a suitable formulation/re‐formulation of the complex synthesis problem at hand, a suitable “environment” for global optimization in which new or re‐customized evolutionary optimization tools can perform in a time‐effective and reliable way.In order to assess the effectiveness and the reliability of the SbD, several different electromagnetic engineering applications will be addressed as benchmark examples ranging from large radome profiling, complex radar systems, 2D and 3D metamaterial‐enhanced devices, as well as other field manipulating devices (wave absorbers, beam benders, polarizers, cloaks, etc.) with potentials at microwave, Terahertz, and optical frequencies. Of course, the intrinsic multi‐disciplinary nature and the generalityof the SbD framework also enable its further exploitations in contiguous engineering areas (including acoustics, mechanics, and civil engineering).


Short CV: Andrea Massa (IEEE Fellow, IET Fellow, Electromagnetic Academy Fellow) received the “laurea” degree in Electronic Engineering from the University of Genoa, Genoa, Italy, in 1992 and Ph.D. degree in EECS from the same university in 1996. From 1997 to 1999, he was an Assistant Professor of Electromagnetic Fields at the Department of Biophysical and Electronic Engineering (University of Genoa). From 2001 to 2004, he was an Associate Professor at the University of Trento. Since 2005, he has been a Full Professor of Electromagnetic Fields at the University of Trento, where he currently teaches electromagnetic fields, inverse scattering techniques, antennas and wireless communications, wireless services and devices, and optimization techniques.

At present, Prof. Massa is the director of the network of federated laboratories “ELEDIA Research Center” [ELEDIA@UTB in Bandar Seri Begawan (Brunei), ELEDIA@UESTC in Chengdu (China), ELEDIA@USIL in Lima (Perù), ELEDIA@UniNAGA in Nagasaki (Japan), ELEDIA@L2S in Paris (France), ELEDIA@CTU in Prague (Czech), ELEDIA@UniTN in Trento (Italy), ELEDIA@TSINGHUA in Beijing (China), ELEDIA@Innov'COM in Tunis (Tunisia)]. Moreover, he is Adjunct Professor at Penn State University (USA), Professor @ CentraleSupélec (France), and UC3M-Santander Chair of Excellence at the Universidad Carlos III de Madrid (Spain). He has been holder of a Senior DIGITEO Chair at L2S-CentraleSupélec and CEA LIST in Saclay (France), Visiting Professor at the Missouri University of Science and Technology (USA), the Nagasaki University (Japan), the University of Paris Sud (France), the Kumamoto University (Japan), and the National University of Singapore (Singapore). It has been appointed IEEE AP-S Distinguished Lecturer (2016-2018).

Prof. Massa serves as Associate Editor of the “IEEE Transaction on Antennas and Propagation” and Associate Editor of the “International Journal of Microwave and Wireless Technologies” and he is member of the Editorial Board of the “Journal of Electromagnetic Waves and Applications”, a permanent member of the “PIERS Technical Committee” and of the “EuMW Technical Committee”, and a ESoA member. He has been appointed in the Scientific Board of the “Società Italiana di Elettromagnetismo (SIEm)” and elected in the Scientific Board of the Interuniversity National Center for Telecommunications (CNIT). He has been appointed in 2011 by the National Agency for the Evaluation of the University System and National Research (ANVUR) as a member of the Recognized Expert Evaluation Group (Area 09, ‘Industrial and Information Engineering’) for the evaluation of the researches at the Italian University and Research Center for the period 2004-2010. Furthermore, he has been elected as the Italian Member of the Management Committee of the COST Action TU1208 “Civil Engineering Applications of Ground Penetrating Radar”.

His research activities are mainly concerned with inverse problems, analysis/synthesis of antenna systems and large arrays, radar systems synthesis and signal processing, crosslayer optimization and planning of wireless/RF systems, semantic wireless technologies, system-by-design and materialbydesign (metamaterials and reconfigurablematerials), and theory/applications of optimization techniques to engineering problems (tele-communications, medicine, and biology).

Prof. Massa published more than 600 scientific publications (partial list available at: among which about 300 on international journals and more than 450 in international conferences where he presented more than 150 invited contributions. He has organized more than 70 scientific sessions in international conferences and has participated to several technological projects in the European framework (20 EU Projects) as well as at the national and local level with national agencies (more than 150 Projects/Grants).




Invited Speeches


Connecting the Dots: A Big Data Paradigm!

   by Dr. Calliope-Louisa Sotiropoulou, INFN Pisa, Italy



We live in the era of “Big Data” problems. Massive amounts of data are produced and captured, data that require significant amounts of filtering to be processed in a realistically useful form. An excellent example of a “Big Data” problem is the data processing flow in High Energy Physics experiments, such as the ATLAS detector in CERN. In the Large Hadron Collider (LHC) 40 million collisions of bunches of protons take place every second, which is about 15 trillion collisions per year. For the ATLAS detector alone 1 Mbyte of data is produced for every collision or 2000 Tbytes of data per year. Therefore, what is needed is a very efficient real-time trigger system to filter the collisions (events) and identify the ones that contain “interesting” physics for processing. The trigger system “connects the dots” to find patterns that are useful.

To achieve the required levels of performance we have constructed the Fast TracKer system. The Fast TracKer is a real-time pattern matching machine able to reconstruct the tracks of the particles in the inner silicon detector of the ATLAS experiment in less than 100 μsec. It is made of 8 different types of custom designed boards with 8000 ASICs and 2000 FPGAs. But this is not enough! We are already preparing the next upgrade, the Hardware Track Trigger, that will provide better performance and efficiency for 2024. All this know-how and high performance hardware can be exploited for a vast variety of applications. We explore implementations on biomedical imaging and security and we have a look on how we can use the HEP hardware accelerators for machine learning and cognitive image processing. We “connect the dots” not only to find patterns but also to find opportunities for new implementations through multidisciplinary research.

Short CV: Dr. Calliope-Louisa Sotiropoulou (IEEE Member ‘03). Calliope-Louisa Sotiropoulou holds a degree in Physics and a Masters in Electronics from Aristotle University of Thessaloniki. She received her PhD in 2014 (Aristotle University of Thessaloniki) in Embedded System Design. After her PhD she received a Marie Curie IAPP scholarship from 2015 to 2017 with the University of Pisa. In 2017 she received a “Galileo-Galilei” Post-Doctoral fellowship (University of Pisa) and an INFN National Scholarship for Post-Doctoral Research. She is currently a research fellow in the Istituto Nazionale di Fisica Nucleare (INFN), Pisa Section.

 Her research lies in the area of advanced image processing implementations and FPGA design. She is working on image processing algorithms and hardware used for particle tracking (very fast pattern matching) in High Energy Physics experiments and their adaptations for use in industrial applications (such as biomedical, security etc.). She has been one of the main electronics systems developers of the Fast TracKer project (an upgrade of the Trigger system of the ATLAS detector at CERN) since 2013. She is currently responsible for the FPGA system development of the PRM (Pattern Recognition Mezzanine) board for the new ATLAS detector Trigger upgrade (for the Phase 2 ATLAS Trigger Upgrade of 2024) and the AM Board (Associative Memory Management and Control) of the Fast TracKer system. Additionally, she has been the leader of a group working on an approach on cognitive image processing. Cognitive image processing mimics the visual functions of the brain and can execute fast contour identification after a learning process that resembles the one used for particle tracking experiments.

 She has participated in several European and nationally funded projects and has more than 300 publications (h-index 30). She has been awarded the first prize for best presentation sponsored by Elsevier (NIM) for "A High Performance Multi-Core FPGA Implementation for 2D Pixel Clustering for the ATLAS Fast TracKer (FTK) Processor" in TIPP 2014. She was also selected and participated in the 3rd Heidelberg Laureate Forum. Dr. Sotiropoulou is an academic editor for the MDPI Applied Sciences Journal and reviewer for several IEEE Transactions and other journals. She has organized and has been a member of the organizing committee of 13 conferences and special sessions. She is also an expert project reviewer for the European Commission.


 "Fiber as key enabler for 5G deployments"

     bThanos Mantzoros,  Victus Manager, Athens 


Mobile Networks Evolution demands for significant capacity enhancements as we move from present generation technologies (4G, LTE+) towards 5G.

Fiber, with its ability to offer nearly limitless bandwidth, will therefore become the key enabler that will unlock 5G’s potential.

In the new networks, fiber will become the most appropriate medium not  only for the backhaul domain (as was the case till now), but also in the front haul.

This is because beyond capacity, fiber can also offer higher reliability, security and resilience vs. other transmission means.


Short CV:

Thanos Mantzoros is presently working at Victus Networks, holding the position of “Transport Technologies & F/O Networks Manager”.

He has more than 25 years of experience in the combined Telecoms/IT domain and more than half of these working within the Mobile Operator Business sector.

He has gained significant experience dealing with Fiber & Copper Networks in Greece & abroad.

Thanos is a lifelong member of IEEE and Technical Chamber of Greece and holds an Electrical  & Electronic Engineer’s degree from NTUA with distinction.


Tutorial Proposal


Title: Converged Optical-Wireless Networks: an Effective Solution for 5G Network Architectures



John Vardakas, Ph.D., Senior Researcher

Iquadrat Informatica S.L.

Paseo San Juan 89, 08009, Barcelona – Spain

Email: This email address is being protected from spambots. You need JavaScript enabled to view it.


Christos Verikoukis, Ph.D., Fellow Researcher

Telecommunications Technological Centre of Catalonia

Av. Carl Friedrich Gauss 7, 08860 Castelldefels – Spain

E-mail: This email address is being protected from spambots. You need JavaScript enabled to view it.



Converged optical-wireless network architectures can be considered as practical solutions that are able to realize an efficient 5G network for high-density and high-coverage network deployments. This tutorial aims to present a comprehensive overview of current converged optical-wireless networking solutions and to put into perspective their role as promising fronthaul configurations that can provide the means for achieving the demanding 5G requirements. Specifically, the tutorial will cover both the current and future optical and wireless networking schemes, while while highlighting those configurations that are applicable for 5G implementations. Furthermore, converged optical-wireless networking configurations will be presented, while special attention will be given to network management and resources allocation schemes. Finally, research efforts on the application of converged network solutions for 5G fronthauling will be discussed in detail, where data and control planes of the converged fronthaul solutions will be covered, as well as challenges that are related to network components and management functions.



John Vardakas received the Dipl.-Eng. degree in electrical and computer engineering from Democritus University of Thrace, Xanthi, Greece, in 2004 and the Ph.D. degree from the University of Patras, Patras, Greece in 2012. He is currently a Senior Researcher with Iquadrat Informatica, Barcelona, Spain. He has published more than 80 papers in journals and international conferences (h-index 17). Dr. Vardakas has participated in more than 12 competitive projects (ICT, Marie-Curie, ENIAC). He is also a regular reviewer in a number of international journals and conferences, while he has participated in the organization of several conferences. His research interests include performance analysis and simulation of communication networks and smart grids. Dr. Vardakas is a member of the IEEE, the Optical Society of America, and the Technical Chamber of Greece (TEE).


Christos Verikoukis got his Ph.D. from the Technical University of Catalonia in 2000. He is currently a Fellow Researcher at CTTC (Head of the SMARTECH department) and an adjunct professor at Barcelona University (Electronics Department). He has published 118 journal papers and over 185 conference papers (h-index 28). He is also co-author in 4 books, 18 chapters in different books and he has filled 2 patents. He has supervised 15 Ph.D. students and 5 Post Docs researchers since 2004. Dr.Verikoukis has participated in more than 30 competitive projects while he has serve as the Principal investigator in national projects in Greece and Spain. He served as the technical manager of the ITNGREENET and the CELTIC-GREEN-T and LOOP projects. Dr.Verikoukis received the best paper award of the Communication QoS, Reliability &Modeling Symposium (CQRM) symposium in the IEEE ICC 2011 & ICC 2014 conference, of the Selected Areas in Communications Symposium in the IEEE GLOBECOM 2014 conference, of the EUCNC 2016 conference and the EURASIP 2013 Best Paper Award for the Journal on Advances in Signal Processing. He was the general Chair of the 17th, 18th and 19th IEEE Workshop on Computer-Aided Modeling, Analysis and Design of Communication Links and Networks (CAMAD), and the TPC Co-Chair of the 15th IEEE International Conference on eHealth Networking, Application & Services (Healthcom) and the 7th IEEE Latincom Conference. He has also served as the symposium co-chair of the CQRM symposium in the IEEE ICC 2015 & 2016 conference. He is currently the Chair of the IEEE ComSoc Technical Committee on Communication Systems Integration and Modeling (CSIM).